2021 Volume 18 Issue 7 Pages 20210062
This study introduces a new bootstrapped switch for improving sampling linearity. In this technology, the introduction of a negative-voltage bootstrap capacitor reduces the parasitic capacitance at the critical signal node, thus improving its linearity. The proposed circuit is simulated using 0.18-µm complementary metal-oxide-semiconductor technology. The parasitic capacitance of the proposed scheme is approximately 30% lower than that of the conventional structure. In the case of rail-to-rail input, the proposed switch achieves a signal-to-noise-plus-distortion ratio (SNDR) of 83.3dB and a spurious-free dynamic range (SFDR) of 82.3dB from a 1.2-V supply at a 50-MHz sampling rate. The SFDR and SNDR of the proposed bootstrapped switch increase by 11.7 and 12.7dB, respectively, compared with those of conventional bootstrapped switches.