LDCPUF: A novel FPGA-based physical unclonable function with ultra-low hardware cost

Abstract

The physical unclonable function based on ring oscillator (RO PUF) is a traditional design suitable for FPGA implementation, but such designs have the disadvantage of low hardware efficiency. This article proposes a new FPGA-based ring oscillator PUF, called loop delay configurable (LDC) PUF. The construction of LDC PUF relies on configurable delay units (CDUs). An LDC PUF configured with n CDUs can generate 2^n-1(2^n-1) response bits. Additionally, we apply the programmable delay lines technology to enhance the reliability of LDC PUF. Compared with the traditional RO PUFs, the LDC PUF has good uniqueness (48.52%) and reliability (96.91%), and most importantly, it has ultra-low hardware cost.