A novel constant-gm rail-to-rail input stage for operational amplifiers

Zhizhi Chen; Qian Wang; Xi Li; Sannian Song; XiaoGang Chen; HouPeng Chen; Zhitang Song

doi:10.1587/elex.20.20230270

LETTER

A novel constant-g_m rail-to-rail input stage for operational amplifiers

Zhizhi Chen, Qian Wang, Xi Li, Sannian Song, XiaoGang Chen, HouPeng Chen, Zhitang Song

Author information

Zhizhi Chen
State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
Schools of Microelectronics, University of Chinese Academy of Sciences
Qian Wang
State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
Xi Li
State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
Sannian Song
State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
XiaoGang Chen
State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
HouPeng Chen
State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
Zhitang Song
State Key Laboratory of Materials for Integrated Circuits, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences

Keywords: rail-to-rail, constant-g_m, operational amplifier, common-mode range, low voltage

JOURNAL FREE ACCESS

2023 Volume 20 Issue 15 Pages 20230270

DOI https://doi.org/10.1587/elex.20.20230270

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Abstract

A novel constant-g_m rail-to-rail input stage for CMOS operational amplifier is presented in this paper. The input stage mainly consists of a PMOS transistors differential pair and a NMOS transistors differential pair placed in parallel as a rail-to-rail differential input stage and the tail currents of the two differential pairs are controlled by a PMOS and a NMOS common-mode voltage sensor respectively. The g_m of the input stage of the operational amplifier could be a constant value within the input common-mode voltage. The simulation result shows that when the power supply voltage is 1.8V and 3.3V respectively, the g_m variation in the entire input range (0∼1.8V or 0∼3.3V) is within ±1.38% and ±3.38%. The power dissipation is 36.9μW and 51.74μW. SMIC 55nm CMOS process and Cadence SPECTRE simulator are used to layout and simulate this work.

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