SILL: Preventing structural attack for logic locking

抄録

Logic locking is an integrated circuits (ICs) protection technique that thwarts reverse engineering, IC overproduction, and IP piracy caused by untrusted foundry and end-users. After Boolean Satisfiability (SAT) solver was applied to crack the keys, researchers proposed various defenses against SAT, approximate, and removal attacks. The Valkyrie attack based on structural analysis has been recently presented that breaks all the existing combinational logic locking techniques. In this letter, we present Structural Interference Logic Locking (SILL) technique. SILL adds interference logic combined with traditional cryptographic logic to drive the primary output, which enables defense against structural attacks by assigning keys to the cryptographic and interference logic according to rules. According to the experimental results, SILL is between (k-4)-secure and (k-2)-secure against SAT Attack while defending against Valkyrie attack.