Modular linear circuit matching method for a 110GHz balanced frequency doubler

Abstract

In the design of terahertz circuits, as the frequency and complexity of modules increase, the traditional field-circuit co-simulation method incurs significantly higher time costs in harmonic balance simulations, thereby reducing design efficiency. To address this issue, this paper introduces a modular linear circuit optimization design approach. This method separates the linear and nonlinear parts of the circuit through the embedded impedance of nonlinear devices, allowing for direct optimization of peripheral matching circuits through linear simulation. It also incorporates a fixed-impedance-based modular design for linear circuits to reduce problem scale and further speed up simulation times. Utilizing this approach, a 110GHz balanced frequency doubler with a quartic harmonic loop was designed and validated. Test results show that with an input power of 120mW, the frequency doubler achieved a maximum output power of 20.86mW at 111.5GHz, corresponding to an efficiency of 17.4%, and maintained output power above 4mW within the range of 107.5-113GHz. Simulation analyses of assembly errors were conducted, and the consistency between simulation results and actual test results was very good, fully demonstrating the effectiveness of this design philosophy.