To improve the performance of permanent magnet synchronous motor (PMSM), a single closed-loop active disturbance rejection control strategy of permanent magnet synchronous motor based on compensation function is proposed in this paper. Firstly, a single closed-loop linear active disturbance rejection controller is designed to reduce the difficulty of controller parameter tuning. Secondly, the control effect of the active disturbance rejection control method is optimized by combining the compensation function observer (CFO) with the linear active disturbance rejection control (LADRC), and the current limiting control link is designed to ensure that the motor works within the current constraint. Finally, the stability analysis is carried out, and the control strategy is simulated and the prototype experiment is carried out. The results show that compared with the traditional LADRC, the improved method has a simple control system structure, strong anti-interference ability to load and parameter changes, and the controller adjustment is simple and easy to implement in engineering.

In order to explore the improvement of IGBT devices with high performance and low loss by unilateral local lifetime control, this paper uses Sentaurus TCAD simulation to compare the effects of overall and unilateral local lifetime control on the performance of insulated gate bipolar transistor. The results show that the unilateral local lifetime control achieves a good compromise in the characteristics of IGBT, especially when the lifetime control area is close to the N-buffer layer, the overall performance of IGBT is the most superior. Further research on unilateral localized lifetime control shows that by reducing the minority carrier lifetime and increasing the width of the lifetime control region at the same time, the turn-off loss of the device can be reduced, but the on-state voltage drop can also be increased. When the width of the one-sided local lifetime control region is 20µm and the minority carrier lifetime is 15ns, the relationship between the two can be well balanced, which provides a reference for the design and optimization of IGBT.

In wireless power transfer (WPT) systems, it is well known that the series-parallel (SP)-compensated topology is preferable for large load systems, like biomedical implants and consumer electronics, etc. However, it is a major challenge for practical SP-compensated WPT applications to obtain efficient and stable power transfer characteristics under the variations of coupling coefficient and resonant frequency. Therefore, based on fractional-order (FO) circuit theory, this paper proposes an SP-compensated FOWPT system with coupling independence and detuning insensitivity. Experimental results show that stable output power is maintained with a constant transfer efficiency in a wide load range, and when the resonant frequency of the receiver is detuned ±5%, the fluctuations of output power and transfer efficiency are less than 1%. The experiment validates the effectiveness of the proposed system.

In this work, a low-complexity encoder is designed and implemented for LDPC codes in the GPS-L1C standard. By using the structural properties of parity-check matrices, we propose a backward substitution encoding method based on look-up-tables for calculating parity-check bits, which avoids the storage of the inverse matrices recommended by the GPS-L1C standard. As a result, the storage requirement and the encoding delay are reduced. The implementation results in 65 nm process indicate that the designed encoder circuit area is 5869.44µm², the number of equivalent gates is 2006, the storage is 600 bits, and the delay is 60 cycles.

This letter presents an ultra-broadband passive vector modulator phase shifter applied to a 4-element tranceiver. A compact cascaded three-stage differential coupler with anti-jamming connective mode and orthogonal placement method is presented, which amalgamates the through-path and coupled-path signal to reduce the phase and magnitude error of the wideband I/Q generator. A magnetic coupling enhanced lattice power synthesizer is proposed, which synthesizes I/Q signals for the accurate wideband target phase interpolation. The proposed phase shifter occupies an extraordinary compact chip area (1.6mm-by-0.6mm) in 0.13µm CMOS process. Measurement results demonstrates that the proposed phase shifter achieves high precision with maximum RMS phase and magnitude error 3.5° and 0.82dB, respectively, in the range of 3∼16GHz. In addition, simulated IP1dB is as high as +19dBm with no power consumption.

In this letter, a new extraction method of GaN switch-HEMT small-signal model with capacitance scanning algorithm is proposed. In the algorithm, the proportional relationship among intrinsic C_gs, C_gd and parasitic C_g is scanned based on a simplified small-signal model without any approximations for capacitance. Comparing with the measured S parameters, optimized model parameters with the minimum error, especially the parasitic C_g, are achieved without assistance of extra methods such as EM analysis. Using this method, the accurate small-signal model for a 0.25µm gate-length GaN switch-HEMT up to 26.5GHz is extracted. This convenient method can be used for both GaN and GaAs switch-HEMT.

This letter proposes a broadband high-efficiency quasi Class E internally matched power amplifier with a compact bandpass output matching structure. By setting all the harmonic impedances following the ideal Class E mode, a specific load-pull analysis is employed to achieve the optimum fundamental impedance region with both high power and high efficiency. In order to further improve the efficiency of the power amplifier, high-efficiency second harmonic impedance range is obtained by the similar load-pull analysis. A compact bandpass matching structure with only three inductors and two capacitors is utilized to realize a broadband output matching of the broadband Class E mode power amplifier. No additional choke inductor is needed for our design, which further reduces the size of the circuit. A compact broadband quasi Class E GaN power amplifier is designed and fabricated using an internal matching method. The drain efficiency of 71% to 76% is achieved at 1.3GHz to 2.0GHz, with an output power of 10W and a power gain of more than 11dB.

A direct torque control (DTC) strategy tailored for switched reluctance motor (SRM) with ring winding structure is proposed. In the proposed topology, stator voltage vectors are reconstructed, and explain the working modes of the SRM. Estimating the reference circulating current by a neural network, that flux magnitude and torque as inputs. With which, ensuring consistent direction of the three-phase winding currents. Circulating current control system and DTC control system of SRM with ring winding structure. Compared the performance of the SRM under various operating conditions in Simulink, validating the effectiveness of the control system.

This paper presents optimal design of digital finite impulse response (FIR) filters based on text convolutional neural network (TEXT-CNN) to reduce the aliasing errors in frequency interleaving digital-to-analog converters (FI-DAC). For an example of FI-DAC with M sub-DACs, we first obtained the approximation error function. We add the real and imaginary parts of the approximation error to obtain the error function. Finally, the task-relevant spectral features are extracted by the convolution operation of the TEXT-CNN model, and the parameters are updated by iterative training to obtain optimal coefficients of digital FIR filters. Additionally, we derived the computational complexity of our proposed TEXT-CNN architecture. Several design examples were given to verify the performance of our proposed optimal design based on TEXT-CNN. The simulation results showed that, by using our presented optimal design based on TEXT-CNN, the maximum distortion error is 0.0016dB, and the maximum aliasing error is -73.24dB which satisfied the desired spurious free dynamic range (SFDR) in a 12-bit FI-DAC system. Further, the computational complexity of our presented optimal design based on TEXT-CNN is compared with other three optimal designs, our proposed TEXT-CNN optimal design can obtain better aliasing errors reduction at the cost of higher computational complexity.

The symplectic integrator (SI), widely used in quantum and classical physics, as a stable and reliable numerical method, was applied to solve the time-dependent Maxwell equations. By employing a wave number space in evaluating space-derivatives, we can avoid numerical errors inherent to finite difference approximations to differential operators. We derived the stability condition and numerical dispersion formula for the studied FFT based SI scheme. A comparison to the conventional finite-difference time-domain method was also made.

In the design of terahertz circuits, as the frequency and complexity of modules increase, the traditional field-circuit co-simulation method incurs significantly higher time costs in harmonic balance simulations, thereby reducing design efficiency. To address this issue, this paper introduces a modular linear circuit optimization design approach. This method separates the linear and nonlinear parts of the circuit through the embedded impedance of nonlinear devices, allowing for direct optimization of peripheral matching circuits through linear simulation. It also incorporates a fixed-impedance-based modular design for linear circuits to reduce problem scale and further speed up simulation times. Utilizing this approach, a 110GHz balanced frequency doubler with a quartic harmonic loop was designed and validated. Test results show that with an input power of 120mW, the frequency doubler achieved a maximum output power of 20.86mW at 111.5GHz, corresponding to an efficiency of 17.4%, and maintained output power above 4mW within the range of 107.5-113GHz. Simulation analyses of assembly errors were conducted, and the consistency between simulation results and actual test results was very good, fully demonstrating the effectiveness of this design philosophy.

To solve the problem of long simulation time and inability to reuse in finite element method for magnetic field analysis, this paper proposes a magnetic field prediction method based on UNet++ with the addition of Inception module. To enhance the model’s capability in capturing multi-scale features of complex geometric structures and reinforcing key features, the UNet++ model was improved by integrating Inception modules, establishing the I-UNet++ model. By predicting the pixels of the image, the corresponding magnetic field distribution is obtained, and the magnetic field prediction results are represented by the image. Use transformers as validation cases to train and test the model. Compared to the prediction results of the UNet++ model, the I-UNet++ model has higher accuracy and can achieve magnetic field prediction on small sample datasets. This provides ideas for real-time calculation of multiple physical fields in transformer.

A wideband filtering power divider (WFPD) with improved out-of-band suppression is proposed in this letter. The WFPD integrates open-circuit stub loaded multimode resonators (OSLMRs) and stepped impedance resonators (SIRs) to achieve good in-band filtering performance, and introduces six out-of-band transmission zeros (TZs) to improve out-of-band suppression. A 3GHz WFPD was designed, fabricated and measured. The measured results shows that the out-of-band suppression level of the designed WFPD is greater than 22.5dB on the left side of the passband and greater than 40dB on the right side.