IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
A 16-µW 10-kHz BW incremental ΔΣ ADC with automatic EDO canceling for implantable neural recording
Xiangwei Zhang, Wenhao Liu, Han Yang, Ying Hou, Xiaosong Wang, Yu Liu
Author information
JOURNAL FREE ACCESS

2024 Volume 21 Issue 3 Pages 20230604

Details
Abstract

This paper presents a DC-coupled, incremental ΔΣ analog-to-digital converter (ADC) based on two-step quantization for high-density implantable neural signal recording. To address the problem of electrode DC offset (EDO), a compensation circuit is proposed in this paper which can automatically cancel the EDO. Fabricated in a 180-nm CMOS process, the prototype ADC achieves a high input impedance, 20-mVpp linear input range, 60.3-dB signal-to-noise and distortion ratio (SNDR). Its core circuit has a power consumption of 16µW and an area of 0.0165mm2. The refered-to-input (RTI) noise is 6µVrms (1-10kHz) and it can cancel the EDO up to ±90mV.

Content from these authors
© 2024 by The Institute of Electronics, Information and Communication Engineers
Previous article
feedback
Top