2025 Volume 22 Issue 3 Pages 20240694
Analog computing-in-memory (ACIM) is one promising solution to address the memory bottleneck existing in traditional computing architectures. However, inefficient analog-to-digital converters (ADC) will inhibit the performance improvement of this system. The primary contribution is in two aspects. First, we present a weight-flip-store coding technology that reduces the ADC resolution by one bit while maintaining the inference accuracy. Second, we propose a readout mechanism that can adaptively choose to skip high three-bit quantization cycles depending on input sparsity, further reducing ADC power. The experimental results show that the ADC power can be reduced by 28.5%-44.4%.