A SiC MOSFET low switching loss strategy based on a reverse conduction

Abstract

To reduce the switching loss of SiC MOSFET. In this paper, based on the reverse conduction process of SiC MOSFET in the third quadrant, the current flow direction and loss changes in the switching process are analyzed in detail, and it is found that the loss of the reverse conduction process is minimum at a specific dead time or load resistance. On this basis, an analytical model for the loss of SiC MOSFET reverse conduction process under different working conditions is established, and based on this model, a low loss strategy is proposed, that is, the output capacitor can discharge within the dead time by selecting the appropriate dead time and load resistance, so as to avoid discharging the output capacitor through the channel, so as to reduce the switching loss. The expressions for calculating dead time and load resistance are also given. Finally, the correctness of the low loss strategy is proved by the experimental results.