Design of digital tunneling-magnetoresistance sensors with 260 pT/√Hz (@1 Hz) noise density

Abstract

Micro-magnetometers with low-noise digital output are extensively utilized in both military and civilian applications. In this work, we propose a method that combines chopping modulation technology with interface ASIC design to effectively attenuate low-frequency 1/f noise. Magnetic shielding and chopping modulation are applied to tunneling magnetoresistance (TMR) sensors. The high-precision interface ASIC incorporates a ripple reduction circuit and utilizes a switched-capacitor sigma-delta topology. The ASIC chip for the TMR magnetometer was fabricated using a 0.35 μm CMOS process provided by Shanghai Huahong company. The active area of the interface ASIC is 3.2 mm × 3 mm. For testing, the interface chip, which includes a three-channel sigma-delta ADC, was integrated with the TMR sensor on the same PCB. The TMR sensor and ASIC operate with a total power consumption of 27 mW under a single 5 V power supply. The integrated TMR sensor system achieves a resolution of 260 pT/√Hz across the signal bandwidth, with a nonlinearity of 0.11% and an input range of ±100 μT.