2026 Volume 23 Issue 1 Pages 20250253
This paper proposes a wide-range, energy-efficient differential cascade voltage switch (DCVS) Level-Shifter (LS), incorporating a cross-coupled pull-down auxiliary network to balance contention. It aims to provide a solution of contention problem in DCVS and improve its limited voltage conversion range. By comprehensively utilizing current-limiter, split-inverter, and multi-threshold transistor technology, the voltage conversion range is further expanded, and power consumption is reduced. In this design, the NMOS network is configured as a super-cut-off state during static conditions, significantly decreasing leakage power. The design is implemented based on 55 nm process. Post-simulation indicates that at a frequency of 1 MHz, the transmission energy is only 19.97 fJ (0.3 V-1.2 V), minimum voltage is 0.15 V. The leakage power is extremely low, at only 117.4 pW (0.3 V-1.2 V). Five LSs designed with similar processes were also re-implemented with 55 nm technology, and post-simulation shows that our design exhibits the lowest leakage power and transmission energy. Comprehensive comparison with others also proves that proposed design has reached the advanced level.
