抄録
This paper describes a high-speed CMOS track-and-hold (T/H) circuit with low distortion. We propose a T/H circuit with a body-bias control circuit to reduce distortion. This control circuit maintains a constant body bias for a switching MOS transistor in tracking mode. This reduces the variation in the threshold voltage due to the body-bias effect, thereby resulting in low distortion. The test chip fabricated using 90-nm CMOS technology shows a high SFDR of 56.3dB at a sampling frequency of 1GHz.
