IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
A high CMRR low power fully differential Current Buffer
Seyed Javad AzhariLeila Safari
Author information

2010 Volume 7 Issue 11 Pages 765-771


In this paper a low power fully differential current buffer is introduced which performs high CMRR exploiting a novel method to alleviate common mode gain. The proposed current buffer is designed and simulated with HSPICE in 0.18µm CMOS process and supply voltage of ±0.75V. The simulation results show an 8.48Ω input resistance, 98dB CMRR, 369MHz bandwidth and power dissipation of 135µW. The corner case simulation has been done which shows an acceptable performance for the proposed buffer in all situations. The proposed circuit tends to be the fundamental block of a new family of electronic differential topologies greatly capable to be much further improved and utilized.

Content from these authors
© 2010 by The Institute of Electronics, Information and Communication Engineers
Previous article Next article