IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
A cache replacement policy to reduce cache miss rate for multiprocessor architecture
Ho LimJaehwan KimJong-wha Chong
Author information

2010 Volume 7 Issue 12 Pages 850-855


In this paper, a new cache replacement policy named Selection Alternative Replacement (SAR), which minimizes shared cache miss rate in chip multi-processor architecture, is proposed. A variety of cache replacement policies have been used for minimizing the cache misses. However, replacing cache items which have high utilization leads to additional cache misses. SAR policy stores the labels of discarded cache items and uses stored information to prevent additional cache misses. The results of experiments show that the SAR policy decreases cache miss rate by 6.01% averagely and enhances instruction per cycle by 7.01% averagely compared with the conventional pseudo least recently used policy.

Content from these authors
© 2010 by The Institute of Electronics, Information and Communication Engineers
Previous article Next article