By comparing experimental and simulation data, surface forces of electro-mechanical memory cells were characterized. In the case of aluminum beams, surface forces were negligible due to rough surface topology. However, in the case of titanium-nitride beams, surface force density was estimated to be 624kPa. The extracted value of surface force can be fed back into the finite-element-analysis (FEA) simulation for better modeling accuracy.

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This paper proposes a method for robust controller design using cascade compensation network. The method uses particle swarm optimization (PSO) to tune the controller and performance weighting function parameters by minimizing a cost function subject to H_∞-norm specifications. Levy's curve fitting method is used to accurately express the multiplicative uncertainty function. The proposed method is applied to pneumatic servo actuator with system uncertainty and wide range of load variations as an example to illustrate the design procedure of the proposed controller. It is shown that the proposed controller presents robustness over a wide range of parameters change. A comparison with conventional H_∞ controller is presented.

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In modulated scattering antenna array (MSAA) system it has at the receiver side encountered low levels of scattering signals [1,2] and interferences in addition to the desired signal. In this paper, we propose to utilize the frequency hopping scheme to improve the performance of scattering signals under the influence of narrow band strong interferences. From the numerical results, it concludes that with larger hopping range it improves the ability of anti-interference effects.

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In this paper, new minimal configuration precision full-wave rectifier is presented. The structure employs one current and one voltage conveyor and only two diodes. It enables to process both low-voltage and low-current signals. Compared to the op amp based circuit, the proposed circuit is able to rectify signals up to 500kHz and beyond with no or small distortion. Experimental measurements are performed that show the feasibility of the new precision full-wave rectifier.

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In this paper, a new cache replacement policy named Selection Alternative Replacement (SAR), which minimizes shared cache miss rate in chip multi-processor architecture, is proposed. A variety of cache replacement policies have been used for minimizing the cache misses. However, replacing cache items which have high utilization leads to additional cache misses. SAR policy stores the labels of discarded cache items and uses stored information to prevent additional cache misses. The results of experiments show that the SAR policy decreases cache miss rate by 6.01% averagely and enhances instruction per cycle by 7.01% averagely compared with the conventional pseudo least recently used policy.

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A high-speed pulse-swallow frequency divider suitable for ΔΣ fractional-N synthesizers is proposed. The proposed structure employs the retiming scheme for the modulus control signal to extend the timing margin, thus remarkably increasing the maximum operating speed. Moreover, unlike the conventional structure, the modulus control signal is set and reset by a single triggering signal to eliminate the unwanted offset at the total division ratio. It simplifies the interface logic between the divider and the ΔΣ modulator in ΔΣ fractional-N PLL's. Simulation results show that the proposed divider provides over three times faster operating speed than the conventional one. The proposed divider has been successfully verified in CMOS RF ΔΣ fractional-N frequency synthesizers.

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This paper presents a novel Network-on-Chip design to efficiently support data-interleaving with arbitrary permutation rule. The proposed NoC offers a run-time conflict resolution for interleaved data under arbitrary permutation rule by using a circuit-switching approach combined with a dynamic path-probing scheme. Experimental results in a 0.18µm STD-cell CMOS process show that the proposed NoC can offer an aggregate bandwidth of up to 522.4Gb/s, while occupying a compact area of 0.473mm² (52kGates). A comparison with other interleaving networks shows the efficiency of the proposed design.

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A new technique adopting the correlated-double amplification (CDA) to improve the signal swing of the “linear-in-dB”variable gain amplifier (VGA) under a low-voltage supply is presented. This technique significantly reduces the finite op-amp gain requirement without compromising the speed. An efficient 3-stage VGA is introduced for the signal to swing up to 2/3 of the supply voltage by incorporating 2-stage push-pull op-amps. A design in a 0.13µm CMOS process under 1.2V supply is proposed and verified.

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Basically, in cellular network systems, the relay station (RS) is used to increase the cell coverage of mobile stations (MS) at a cell edge. But, the system performance due to the use of RS is interfered by the neighboring cells and decreased by the low power of received signals, generally. In order to overcome these disadvantages and get a diversity gain or a high data rate, we design and propose the multiple-input multiple-output (MIMO) multi-hop relaying system structure using the BS cooperation scheme, and evaluate the performance of the proposed system in this letter. Therefore, the MSs can effectively receive the signals through the proposed design which uses the RS in the overlapping regions.

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OpenGL ES 1.1 is a de facto standard for the 3D graphics API on embedded systems and handheld devices including mobile phones. We present design process and implementation results of our software OpenGL ES 1.1 product. Since the standard document only specifies the API functions and their external actions, the implementer should design all the details of the internal 3D graphics pipeline and exhaustively optimize them. To clearly express the internal pipeline and to explicitly represent related state variables, we introduce some enhancements to UML activity diagrams. Based on these enhanced diagrams, we accomplished the initial draft design and iterative optimizations of the internal pipeline. During the implementation stage, starting from our previous wrapper implementation, we used an iterative block-by-block implementation scheme with immediate verifications. Finally, we achieved a full software implementation of OpenGL ES 1.1, which passes all the official conformance test suites and also satisfies all the requirements in the standard specification. This product is now ready for commercial services.

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It is important to realize the efficient accommodation of access traffic for various services that will have a wide dynamic range of bandwidth. To achieve this, we are studying a new access network based on multi-stage semiconductor optical amplifiers (SOAs), which has a multi-access point that separately accommodates different services. This paper describes the configuration and advantage of this network and presents a traffic design obtained by simulations that examined the number of optical-electrical-optical (OEO) conversions at first-in first-out (FIFO) controlling packets with a view to reducing power consumption.

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