抄録
A novel sub-threshold inverter based on nanoscale Field Effect Diode (FED) and a basic static CMOS inverter are investigated in this paper. Simulation results demonstrate that power consumption and Power Delay Product (PDP) of the sub-threshold inverter which is designed with nanoscale FED are 57.9% and 18.21% less than these factors in a comparable CMOS sub-threshold inverter. So the nanoscale FED scheme can provide better power efficiency than standard sub-threshold CMOS inverters.
