IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
A 24mW, 5Gb/s fully balanced differential output trans-impedance amplifier with active inductor and capacitive degeneration techniques in 0.18µm CMOS technology
B. ShammugasamyT. Z. A. ZulkifliH. Ramiah
著者情報
ジャーナル フリー

2010 年 7 巻 4 号 p. 308-313

詳細
抄録
In this paper, a low power 24mW 5Gb/s differential output transimpedance amplifier (TIA) is realized in 0.18µm CMOS technology for optical interconnect application. The TIA is a fully balanced and differential architecture design that can improve immunity with the common mode noise attributed to the power supply. The differential gain achieved is 66dBΩ with a -3dB bandwidth of 4.0GHz for a 0.5pF photodiode capacitance (Cpd) by implementing both the active inductor peaking and capacitive degeneration techniques. The TIA core consumes only 24mW power from a single 1.8V power supply while achieving the sensitivity of -19.0dBm for a bit error rate (BER) of 10-12.
著者関連情報
© 2010 by The Institute of Electronics, Information and Communication Engineers
前の記事 次の記事
feedback
Top