Abstract
This paper analysis the conventional Comparator-Based Switched-Capacitor (CBSC) structure and presents a modified structure that uses interposing middle-phase in charge-transfer mode to solve the tight trade-off between accuracy, speed, and input-swing at no extra power. To meet the accuracy, speed and input-swing requirements, appropriate values of design parameters are analytically discussed and a procedure for choosing optimum values for design is presented. Moreover, digital controller for current sources and comparator are given for the new structure. The effectiveness of the proposed structure is verified through simulation of a gain-stage using a 0.13-um CMOS-technology with 1V power-supply and comparing with conventional CBSC.
