IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
Efficient realization of reconfigurable FIR filter using the new coefficient representation
K. D. SadeghipourA. Abbaszadeh
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2011 Volume 8 Issue 12 Pages 902-907

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Abstract

In this paper, efficient reconfigurable finite-impulse response (FIR) filter architecture is presented based on a new coefficient representation method. The proposed binary signed subcoefficient method increases the common subexpressions and decrease the hardware usage and complexity. FPGA synthesis results of the designed two reconfigurable FIR filter architectures show that 33% and 27% reductions in the resources usage are achievable over the previously reported two state of the art reconfigurable architectures.

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© 2011 by The Institute of Electronics, Information and Communication Engineers
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