IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
Development and evaluation of a microstep DFA vulnerability estimation method
Masahiro KaminagaArimitsu ShikodaHideki Yoshikawa
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JOURNALS FREE ACCESS

2011 Volume 8 Issue 22 Pages 1899-1904

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Abstract

Recently, various studies of attack methods of round reduction differential fault analysis (DFA) using fault injection in block cipher-implemented microcontrollers have been reported. However, few studies have focused on the quantitative evaluation method of round reduction DFA vulnerability using detailed fault injection timing dependency of attack success rate. This is required to improve microcontroller security. Hence, we propose a quantitative evaluation method against round reduction DFA using a micro step DFA vulnerability chart and a vulnerability estimator (VE) that consists of pairs of fault injection timing and attack success rate.

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© 2011 by The Institute of Electronics, Information and Communication Engineers
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