We propose cooperative communication as a means to enable efficient and scalable barrier synchronization on mesh-based many-core architectures. Our approach is different from but orthogonal to conventional algorithm-based optimizations. It relies on collaborating routers to provide efficient gather and multicast communication. In conjunction with a master-slave algorithm, it exploits the mesh regularity to achieve efficiency. The gather and multicast functions have been implemented in our router. Synthesis results suggest marginal area overhead. With synthetic and benchmark experiments, we show that our approach significantly reduces synchronization completion time and increases speedup.
This paper presents a high performance design for Context-Based Adaptive Variable Length Coding (CAVLC) used in the H.264/AVC standard. A two-stage encoder is proposed to make the scan and encode stage work simultaneously. The scan engine scans four coefficients at each cycle. Parallel encoder for four “levels” and parallel encoder for four “Run_before” are adopted to accelerate the encode engine. Only 120 cycles at most are needed to process one MB. The proposed CAVLC encoder can support 4Kx2K@60fps (frame per second) real-time encoding at 250MHz and the gate count is about 32k.
This report combines offset-launching and multi-stage decision feedback equalizer (DFE) to evaluate performance of one multi-channel CWDM system with multimode fiber (MMF). The transmission distance for the system up to 40-Gbps capacity can be extended significantly.
In the current paper, an improvement of piecewise curvature-corrected CMOS bandgap reference (BGR) circuit is proposed. The circuit utilizes piecewise nonlinear curvature-corrected current (PNCCC) in a conventional BGR with a current control circuit, which compensates for the voltage reference at a higher temperature range. The current control circuit (CCC) is used to reduce the total current at low temperature when the PNCCC generator is inactive. The proposed circuit is realized in CMOS 0.13µm and has been verified to be able to save power consumption by 18.6% compared with a circuit without the current control circuit.
This letter presents a novel under-voltage and over-voltage (UVOV) detection circuit which detects whether the supply voltage is within the operating range or not, with a simple configuration. The proposed circuit exploits only a transistor for detecting both under and over supply voltages and hence, it provides smaller area and better robustness to offset and mismatch compared to the previous ones. The prototype is implemented in 5um BCDMOS process with an active area of 0.0625mm2. The measurement results show that the prototype detects under and over voltages at 3.85V with 650mV of hysteresis and 48.45V with 700mV of hysteresis, respectively, while dissipating 18.7uA at 12V in simulation.
A compact microstrip-fed planar antenna is proposed. The antenna exhibits a dual-band operation. It consists of a radiation patch with two quarter circles at the lower corner and an L-shaped open stub. Simulation and measurements show this antenna is suitable for UWB and other wireless communication applications.
We propose a microwave/millimeter-wave signal generation device using difference frequency generation in a rectangular waveguide embedded with a nonlinear LiTaO3 crystal. The rectangular waveguide is designed as a single-guided mode structure for the generated microwave/millimeter-wave signal. Dispersion of the rectangular waveguide is also utilized to obtain a phase matching condition between the input lightwaves and the generated microwave/millimeter-wave. In the experiment, a 25GHz signal was successfully generated. Microwave characteristics of the proposed device were also investigated by using a 3-D electromagnetic wave analysis software. We expect the proposed device is applicable for higher-frequency microwave/millimeter-wave signal generation.
Recently, various studies of attack methods of round reduction differential fault analysis (DFA) using fault injection in block cipher-implemented microcontrollers have been reported. However, few studies have focused on the quantitative evaluation method of round reduction DFA vulnerability using detailed fault injection timing dependency of attack success rate. This is required to improve microcontroller security. Hence, we propose a quantitative evaluation method against round reduction DFA using a micro step DFA vulnerability chart and a vulnerability estimator (VE) that consists of pairs of fault injection timing and attack success rate.
In this paper, transmission line cloaking for arbitrary objects with different dimensions is presented. Double-sided parallel-strip line network causes electromagnetic waves to be coupled to the network surrounding the object and pass them across it without forward and backward scattering. Using of these unloaded transmission lines makes the simplicity of the structure feasible. Achieving a broadband cloaking condition is the other advantages of the proposed structure. Large object cloaking is provided by the using of a new structure which has an empty space in the center of similar previous structures. Simulation results demonstrate the quality of cloaking for different dimensions in conventional and proposed structures.
Although CMOS Time-of-Flight Range Image Sensors have been recently realized, the fabrication process is modified by inserting an extra mask layer to allow efficient TOF dependent charge transfer. This work focuses on the selection procedure of amplifiers to be used in the design of the TOF pixel using the standard CMOS process. From our analysis, it is found that the Cascode amplifier is the best amplifier to be used when compared to three other amplifiers. Simulation results show that the Cascode amplifier has a Charge Transfer Efficiency of 95.08% and power dissipation of 1.32µW, which enables the same charge transfer mechanism required for TOF imaging.
This study proposes an efficient and accelerated Intelligent Ray-Tracing (IRT) algorithm based on Binary Angle Division (BAD) technique for radio signal prediction in indoor area. The intelligent features of the proposed IRT can skip the processing of the unnecessary signals based on the invalid region and reduce the number of candidate objects (obstacles) as well as their edges while performing ray-object intersection tests, which can make the algorithm faster as well as more accurate. The obtained results are compared with the existing indoor ray propagation methods to prove the superiority of the proposed IRT technique in terms of both computational efficiency and accuracy of signal prediction.
We propose a novel type of mode coupler consisting of two identical rectangular few-mode waveguides with different orientations. Numerical simulation indicates that mode extinction ratio exceeding 20dB can be achieved by well-aligned waveguides.