IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
Three-phase clock driven chaotic circuit with dual feedback loops
Hanjung Song
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2012 Volume 9 Issue 19 Pages 1516-1521

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Abstract

A novel dual feedback looped chaotic integrated circuit driven by a three-phase non-overlapping clock is presented. The proposed circuit consists of four MOS switches for S/H (sample and hold), a level shifter and two nonlinear functions for nonlinearity in the feedback. After optimizing of nonlinear functions for chaotic signal generation, the proposed circuit was simulated with SPICE program using a 0.6µm CMOS process parameter. For various control voltages, its chaotic dynamics such as time waveform, frequency spectra and bifurcation diagram were analyzed. We confirmed that the circuit can generate discrete chaotic signals in specific control voltages.

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© 2012 by The Institute of Electronics, Information and Communication Engineers
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