2012 Volume 9 Issue 23 Pages 1786-1791
This paper presents a K-band Gilbert mixer in a 0.18µm CMOS technology by means of a π-Network and Post Distortion Cancellation (PDC) technique to achieve high gain, high linearity, and moderate noise figure. We use the parasitic capacitances that appear at nodes between RF and LO stage for implementing π-Network. Circuit analysis and MATLAB simulation show that the above technique is useful for wide-band applications. Simulation illustrates a power consumption of 9.68mW at 1.8V, 3.36dB improvement in power conversion gain, and 2dB reduction in NF at 21.5GHz with LO power of -1dBm in comparison with the case when PDC technique is used only. Compared to conventional mixer, it improves the IIP3 by 6dB.