IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543
LETTER
An universal architecture for designing modulo (2n-2p-1) multipliers
Lei LiJianhao HuYiou Chen
著者情報
ジャーナル フリー

2012 年 9 巻 3 号 p. 193-199

詳細
抄録
In this express, we propose an extending method, which extends the residue set of modulus (2n-2p-1) from [0,2n-2p-1) to [0,2n-1]. The proposed extending method can simplify modulo (2n-2p-1) operations and we can simply cope with the bits weighted by 2n+k(k≥0). With the proposed extending method, we propose an universal architecture for designing high-efficient modulo (2n-2p-1) multipliers on the condition n≥2p+1. Synthesized results demonstrate that the proposed modulo (2n-2p-1) multipliers have a good performance.
著者関連情報
© 2012 by The Institute of Electronics, Information and Communication Engineers
前の記事 次の記事
feedback
Top