A Low-Power Reference Buffer with High PSRR and Low Crosstalk for Time- Interleaved ADCs

Hyeonho Song; Jintae Kim; Minjae Lee

doi:10.1587/elex.10.20130482

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A Low-Power Reference Buffer with High PSRR and Low Crosstalk for Time- Interleaved ADCs

Hyeonho Song, Jintae Kim, Minjae Lee

著者情報

キーワード: Reference buffer, Time Interleaved ADC, analog to digital converter, Pipelined ADC, 1.5 bit ADC, High PSRR

ジャーナルフリー早期公開

論文ID: 10.20130482

DOI https://doi.org/10.1587/elex.10.20130482

この記事には本公開記事があります。

The final version of this article is now available: Vol. 10 (2013), No. 16 p. 20130482

詳細

抄録

A low power reference buffer is proposed to achieve high PSRR and less crosstalk between channels for time-interleaved analog-to-digital converters (ADCs). A conventional approach requires enough bandwidth in feedback amplifiers to suppress high frequency supply noise, which tends to increase power consumption. Furthermore the number of output drivers that share error amplifier output is unavoidably limited due to the coupling across ADC channels. We propose design techniques to improve the corner frequency of power supply rejection ratio (PSRR) by a factor of 100 and the cross-channel isolation by 20dB without drawing more current.

責任著者(Corresponding author)

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