IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543

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Conduction and Switching Loss Reduction of Lateral Power Diode on Silicon-on-Insulator Substrate with Trenched Buried Oxide Layer
Satoshi ShirakiShigeki TakahashiYouichi AshidaAtsuyuki HirumaTsuyoshi Funaki
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ジャーナル フリー 早期公開

論文ID: 10.20130807

この記事には本公開記事があります。
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We have investigated the static and dynamic characteristics of high voltage lateral power diode (L-Diode) on silicon-on-insulator (SOI) substrate with planar / trenched buried oxide (Box) layer on the basis of device simulations. The conduction loss of the conventional L-Diode with planar Box layer is found to be reduced as a result of improving blocking capability by trenching the Box layer. In addition, the switching loss of the conventional L-Diode with planar Box layer, which stems from the second peak of the recovery current, is substantially reduced by adopting the trenched Box layer with suppression of the dynamic avalanche phenomenon.
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© 2013 by The Institute of Electronics, Information and Communication Engineers
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