IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543

この記事には本公開記事があります。本公開記事を参照してください。
引用する場合も本公開記事を引用してください。

Analysis on the Application of On-chip Redundancy in the Safety-critical System
Bo-gen CAICheng-ming JINLian-chuan MAYuan CAOHideo Nakamura
著者情報
ジャーナル フリー 早期公開

論文ID: 11.20140153

この記事には本公開記事があります。
詳細
抄録
IEC 61508-2010 puts special limits on the on-chip redundancy of one single chip, for example the safety integrity level (SIL) is limited up to SIL 3. About this, however, there are no specific explanations. Based on the safety-critical system of on-chip redundancy for a typical programmable logic device (FPGA), this paper proves that the highest SIL is 3; analyses the factors that may impact the safety integrity of redundancy system, and furthermore, provides reasonable solutions. The results show that the use of 1oo2 channel redundancy scheme can effectively improve the safety integrity level of the on-chip redundancy.
著者関連情報
© 2014 by The Institute of Electronics, Information and Communication Engineers
feedback
Top