Optimization of periphery circuits in a 1K-bit PCRAM chip for highly reliable write and read operations

Xi Fan; Houpeng Chen; Qian Wang; Xi Li; Yiyun Zhang; Jiajun Hu; Rong Jin; Yifeng Chen; Zhitang Song

doi:10.1587/elex.11.20141071

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Optimization of periphery circuits in a 1K-bit PCRAM chip for highly reliable write and read operations

Xi Fan, Houpeng Chen, Qian Wang, Xi Li, Yiyun Zhang, Jiajun Hu, Rong Jin, Yifeng Chen, Zhitang Song

著者情報

Xi Fan
State Key Laboratory of Functional Materials for Informatics, Shanghai Key Laboratory of Nanofabrication Technology for Memory, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences
Houpeng Chen
State Key Laboratory of Functional Materials for Informatics, Shanghai Key Laboratory of Nanofabrication Technology for Memory, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences
Qian Wang
State Key Laboratory of Functional Materials for Informatics, Shanghai Key Laboratory of Nanofabrication Technology for Memory, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences
Xi Li
State Key Laboratory of Functional Materials for Informatics, Shanghai Key Laboratory of Nanofabrication Technology for Memory, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences
Yiyun Zhang
State Key Laboratory of Functional Materials for Informatics, Shanghai Key Laboratory of Nanofabrication Technology for Memory, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences
Jiajun Hu
State Key Laboratory of Functional Materials for Informatics, Shanghai Key Laboratory of Nanofabrication Technology for Memory, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences
Rong Jin
State Key Laboratory of Functional Materials for Informatics, Shanghai Key Laboratory of Nanofabrication Technology for Memory, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences
Yifeng Chen
State Key Laboratory of Functional Materials for Informatics, Shanghai Key Laboratory of Nanofabrication Technology for Memory, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences
Zhitang Song
State Key Laboratory of Functional Materials for Informatics, Shanghai Key Laboratory of Nanofabrication Technology for Memory, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences

キーワード: PCRAM, periphery circuits, reliability, resistance distribution, step-down pulse

ジャーナルフリー早期公開

論文ID: 11.20141071

DOI https://doi.org/10.1587/elex.11.20141071

この記事には本公開記事があります。

The final version of this article is now available: Vol. 11 (2014), No. 24 pp. 20141071-20141071

詳細

抄録

A 1K-bit phase change random access memory (PCRAM) with improved periphery circuits for better reliable operations has been successfully developed in 130 nm CMOS technology. A flexible write driver is proposed to provide a novel continuous step-down pulses by studying programming strategies while a reliable read circuit is designed by investigating the special transition characteristics of PCRAM, leading to an effective write operation and a non-destructive read operation without any additional changes of the storage states. In addition, a large sense margin has been achieved and the read results corresponding well with the write operations, which demonstrate the influences of technology variations have been considerably decreased with the proposed periphery circuits.

責任著者(Corresponding author)

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