IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543

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High-Throughput ASIC Design for E-mail and Web Intrusion Detection
Ming-Jen ChenYi-Mao HsiaoHui-Kai SuYuan-Sun Chu
著者情報
キーワード: IDS, Snort, ASIC
ジャーナル フリー 早期公開

論文ID: 12.20140854

この記事には本公開記事があります。
詳細
抄録
The malicious attacks adversely affect every user over the Internet. This paper proposes an application-specific integrated circuit (ASIC) design with parallel exact matching (PEM) architecture to accelerate the Snort intrusion detection system (IDS). The PEM is half mesh architecture to compare the Snort rules in parallel. The ASIC named snort rule accelerator (SRA) focuses on the TCP protocol to detect the attacks of e-mail and web applications. As shown in post-layout simulation, the ASIC operated at 435 MHz to perform the needs of high speed with 13.9 Gbps system throughputs. So that it resolves the complexity of information security limitation to manage data received from the 10Gbps core network.
著者関連情報
© 2015 by The Institute of Electronics, Information and Communication Engineers
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