抄録
This paper presents an efficient multi-standard decoder for quasi-cyclic low-density parity-check (QC-LDPC) codes. By employing the configurable multi-bank memory structure, simplified permutation network and multiple pipelined datapaths, the decoder can efficiently support WiMAX and WiFi standards without any structural changes. The offset-min-sum-based row-layered decoding algorithm is adopted to reduce the computation complexity. Based on these optimizations, the proposed decoder can achieve about 658Mbps(1410Mbps) and 527Mbps(1129Mbps) for WiMAX and WiFi standards on TSMC 130nm(and 65nm) Application Specific Integrated Circuits (ASICs) platforms, respectively. Compared with the previous works, the throughput can obtain up to 10x improvement for WiMAX standard and 5x improvement for WiFi standard.
