11b 60MHz pipelined ADC with inverter-based class AB amplifier in 28nm CMOS technology

抄録

An inverter-based class AB amplifier is proposed to design the 11b pipelined analogue-to-digital converter (ADC) in 28nm CMOS technology. The structure of the proposed amplifier is more concise compared with conventional amplifiers. The amplifier occupies small area, and its quiescent dissipation is only 1.4mA. This structure is suitable for design in scaled process. The operation of the amplifier is carefully elaborated. The simulation results show: the ADC can achieve 75.3dB SFDR and 66.8dB SNDR, while it occupies an area of 0.4mm² and consumes a power of 17mW with 1.05V supply. These results yield a FOMS of 159.3 dB.