A Ka-band 23dBm power amplifier based on 4-way parallel-series power combiner with loaded capacitors in 65-nm CMOS

抄録

This paper presents a Ka-band 4-way combining power amplifier (PA) implemented in 65nm CMOS process. A T-type power combiner with loaded capacitors is proposed, which is cascaded with transformer-based power combiner to form a hybrid power combiner. The hybrid combiner can combine the output power of 4-way differential PAs into one channel compactly, and makes them achieve optimal load matching. The measured saturation output power (P_sat), output 1dB compression point (OP_1dB) and maximum power added efficiency (PAE_max) are 23dBm, 18.9dBm and 27% at 35GHz respectively. It achieves a 3dB bandwidth of 30.7GHz-38.5GHz within a core area of 0.26mm².