IEICE Electronics Express
Online ISSN : 1349-2543
ISSN-L : 1349-2543

この記事には本公開記事があります。本公開記事を参照してください。
引用する場合も本公開記事を引用してください。

A novel SCA-resilience flip-flop design utilizing the current mode logic based on the three-independent-gate field effect transistors
Yuehui LiYanjiang LiuXianzhao XiaYiqiang Zhao
著者情報
ジャーナル フリー 早期公開

論文ID: 18.20210248

この記事には本公開記事があります。
詳細
抄録

In this paper, current mode logic based on the three-independent-gate field effect transistor (TIGFET) is introduced as the circuit-level side-channel attack (SCA) countermeasures, and a SCA-resilience flip-flop (DyCML) is designed to make the power consumption constant. Then, a simplified advanced encryption system (AES) is built, and power analysis is performed to evaluate the SCA-resistance efficacy. Simulation results show that the key with the TIGFET-based DyCML is not revealed with 255 power traces. The proposed design occupies less area usage and requires less delay overhead compared to the original TIGFET-based true single-phase clock (TSPC) and modified TSPC (mTSPC).

著者関連情報
© 2021 by The Institute of Electronics, Information and Communication Engineers
feedback
Top