A pulse stretch circuit with resolution of 1.55ps used in low-cost low-power TDC

Abstract

A pulse stretch interpolator used in low-cost and low-power CMOS time-to-digital converter (TDC) is proposed in this paper. The reference clock frequency of the TDC is 6.4 MHz and the range is 5120 us. The chip size is 0.5 mm x 0.5 mm as fabricated in the TSMC 180nm CMOS process. The time resolution can be realized as 10ps and the power consumption is 1.92 mW. The time period of an input is divided into two parts. The first step of coarse quantization uses a clock to quantize an integer number of clock cycles. The second step of fine quantization is to stretch the pulse width of less than one clock cycle after coarse quantization. The pulse stretch interpolator charges and discharges the capacitor under narrow input pulse control in order to expand the narrow pulse. In this way, TDC achieves higher resolution with low power consumption. The pulse stretch interpolator’s resolution is 1.55ps in all corners.