Article ID: 22.20250518
This letter presents a novel comma detection module and an optimized parallel 8b/10b decoder for the JESD204B receiver. The presented architecture is characterized by low power and small area. Thereinto, the distributed detection methodology as well as logical decomposition method are proposed for overcoming the complex circuitry of the comma detection module and reducing its power consumption. Furthermore, the parallel 8b/10b decoder is based on the combinational logic, while the Quine-McCluskey (Q-M) algorithm is applied to simplify the decoding logic. The proposed architecture occupies 2952 μm2 and 0.58 mW, decreasing by 36% and 27% respectively compared with typical architecture. The simulation and implementation results demonstrate that the proposed controller can achieve the comma detecting and decoding functions.