擬似白銀比を用いた逐次比較近似AD変換器冗長アルゴリズム設計

抄録

We propose a redundant successive approximation resister (SAR) ADC design method using an SAR search algorithm with a silver ratio (meaning square root of 2). This enables high-speed AD conversion using digital error correction. We show that this method can realize high speed SAR AD conversion when taking account into the internal DAC incomplete settling and using two clocks of different periods. We also present that its control circuit can be designed with simple structure.