2025 年 145 巻 3 号 p. 371-376
This article reviews the development of Si-based thermoelectric device conducted by the author’s group. A series of integrated thermoelectric devices of silicon-nanowire thermoelements were fabricated with a matured and standard Si-CMOS process, demonstrating scaling rules for miniaturization and large-scale integration on thermoelectric performance. The thermoelectric device exhibited a high specific power generation capacity of 0.9 µW/cm2K2. The optimum device layout to maximize the power generation capacity will be discussed in detail.
J-STAGEがリニューアルされました! https://www.jstage.jst.go.jp/browse/-char/ja/