抄録
A digital multiplier circuit module is proposed, which is cascadable to perform multiplication for any word length, without the use of external circuitry. The number of cascaded modules can be changed dynamically, so that it is useful for designing a system, where many high speed multiplications and less speed but high precision multiplications coexist, as in the application to robot control or image processing.
The soundness of the circuit was confirmed by making one-chip integrated multipliers, and no drawbacks are expected if it is used as macro cells in VLSI.
No other method can compare with the parallel multiplier for speed, but to multiply numbers with digits beyond the chip capability, it is necessary to prepare not only several parallel multipliers but also external circuitly.
Such an experience is what we encounter due to change of specification or application environment. The proposed method is useful to cope with such problems.
