デバイス特性によるSiナノ細線の評価と自己抑止酸化による細線幅の改善

抄録

Recently, ultra-small Si devices utilizing quantum-size structures have received much attention to open a new Si device stream. However, such ultra-small Si structures might cause unintended behaviors in the device operation.
In this paper, we evaluate the influence of shrinking of a Si nanowire channel through Si nanowire device characteristics. In the fabricated 15-10-nm-wide Si nanowire device, we confirm that the Si nanodevice expectedly works as a single electron or few electron memory. However, in the other 5-10-nm-wide Si nanowire device, we observe an unintended Coulomb blockade effect due to the fluctuation of the Si nanowire width.
To suppress the unintended Coulomb blockade effect, we reveal the usefulness of the self-limiting oxidation effect to Si nanowires, for the first time, and improvement (39%) in uniformity of the Si nanowire is demonstrated. It is shown, therefore, that self-limiting oxidation is promising for fabrication of Si nanodevies.