抄録
Neural network hardware is necessary for demanding real-time applications such as pattern recognition. Over one million gates of the latest FPGA (Field Programmable Gate Array) are available for the dedicated neuro hardware. In this paper, an improved calculation algorithm of the neuron model with sigmoid function is proposed, which is suitable for hardware implementation. The proposed algorithm is based on the multi dimensional binary search. The neuron circuis implemented on FPGA by the proposed algorithm have shown the excellence in size and circuit frequency compared with the conventional circuits with sum of product operation.
