抄録
Recently, high-switching-frequency and high-di/dt switching operation of inverters has been studied for the purpose of finding a way to reduce the size and weight of LC filters. In power electronic circuits, the stray inductance of the bus bar between a DC capacitor and power devices may cause an overshoot voltage and electromagnetic interference (EMI) noise for high-di/dt switching operation. Therefore, it is necessary to design the bus bar structure while considering the minimization and optimization of the bus bar inductance value. Generally, the bus bar inductance is analyzed by using 3D finite element method (FEM), but it takes a long time to construct analytical models and to perform the analysis. This paper proposes an improved calculation method for a medium-voltage inverter, based on the partial inductance calculation method. In addition, the wiring structure is designed by considering the stray inductance with using an inductance-mapping method.
