Input Current Harmonic Reduction based on Space Vector PWM for Three-level Inverter Operating over a Wide Range Power Factor

抄録

This paper proposes a space vector pulse width modulation (SVPWM) that reduces current harmonics flowing through DC-link capacitors of a three-level voltage source inverter in a three-phase motor drive system. The inverter input current harmonics are minimized by optimizing the applied voltage space vectors to reduce the fluctuation of the inverter input current around its average value. Furthermore, the proposed strategy can be used for a wide range of load power factors by changing the combination of voltage space vectors according to output phase current conditions. It is experimentally shown that the proposed SVPWM reduces the inverter input current harmonics by 27.4% at most, compared with that of the conventional SVPWM. Moreover, the analytical and experimental results clarify that the proposed SVPWM reduces the inverter input current harmonics at any load power factor.