ITE Technical Report
Online ISSN : 2424-1970
Print ISSN : 1342-6893
ISSN-L : 1342-6893
32.45
Session ID : IST2008-51
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Process compensation techniques for low-voltage CMOS digital circuits
Yusuke TSUGITAKen UENOTetsuya HIROSETetsuya ASAIYoshihito AMEMIYA
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Abstract
In low-voltage CMOS digital circuits, threshold voltage varaition fluctuates circuit performance significantly. In this work, on-chip process compensation techniques for low-voltage CMOS digital circuits were proposed. We employed on-current compensation tehchniques in a digital circuit by using a reference current, that is independent of process variations. In addition, the technique can be applied to circuit performance's fluctuation induced by temperature change. We confirmed the operation of the circuit by a SPICE simulation with a set of 0.35-μm standard CMOS parameters, and performed Monte Carlo simulations assuming process spread and device mismatch in all MOSFETs. SPICE simulation demonstrated that the process variations of digital circuits were improved to 65% by applying the proposed architecture. The techniques will be useful for on-chip process compensation of digital circuits.
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© 2008 The Institute of Image Information and Television Engineers
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