For CNN implementation on FPGA, it is required to consider the resource utilization of multiply-add circuit and memory access for weight of neural network. In this paper, we propose power of 2 approximation of weight. This method enables multiply-add circuit with Shifter and Adder. Our proposed method improved LUT consumption up to 2.5 times.Furthermore, the bit width required for weight was reduced to 5 bits in Convolutional layer and to 3bits in Fully connected layer.
