パワーエレクトロニクス学会誌
Online ISSN : 1884-3239
Print ISSN : 1348-8538
ISSN-L : 1348-8538
論文・研究報告・講演資料
回路分割法によるパワーエレクトロニクス回路の並列化シミュレーション
高見 悠基加藤 利次井上 馨
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2015 年 41 巻 p. 120-126

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This paper proposes a fast parallel circuit simulation method for a power electric system by applying an explicit integration formula to selected energy storage elements such as inductors and capacitors. The forward Euler (FE) formula is applied to selected series inductors and parallel capacitors. Then an implicit formula such as the backward Euler (BE) formula is applied for stable numerical integration, and the optimum step size is selected for each subcircuit. A parallel processing method that utilizes thread processing techniques based on OpenMP application program interfaces with a multicore CPU and shared-memory system reduces its processing time. A new general algorithm based on a thread processing technique, a subcircuit memory processing technique, and a binary variable step size method is described to utilize numerical processing at each time step synchronously and efficiently. Then a new automatic partitioning method of a system into subcircuits is described. This paper also proposes how to process a PE system with a DSP-based digital control principle. The proposed method is applied to power electronic systems. It is investigated how the proposed method works and shown for effectiveness of parallel simulation by the circuit partitioning.

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