Fabrication of 40nm-gate MOSFETs by Nano-electron Beam Direct Writing

抄録

A nanometer electron beam lithography system has been developed and used for fabricating sub-0.1μm gate MOSFETs. The system uses a Zr/O/W thermal field emitter (TFE) and has a 5-nm- diameter beam at a current of 100pA, and an acceleration voltage of 50kV. A 10-nm line in PMMA resist on a thick Si substrate was demonstrated. We develop an inorganic resist, Li_XAl_1-XF, which shows a potential for high resolution lithography less than 10nm. A chemically amplified negative resist was used as a single layer mask for MOS FET gate fabrication, and showed high resolution less than 0.1μm width. Proximity effect correction was applied to the gate lithography, resulting in excellent line width control even less than 0.1μm. Operation of a 40-nm-poly-silicon gate NMOSFET was confirmed.