IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Special Section on Fundamentals and Applications of Advanced Semiconductor Devices
Type-II HfS2/MoS2 Heterojunction Transistors
Seiko NETSUToru KANAZAWATeerayut UWANNOTomohiro AMEMIYAKosuke NAGASHIOYasuyuki MIYAMOTO
著者情報
キーワード: TMDC, MoS2, HfS2, tunnel FET, heterojunction
ジャーナル 認証あり

2018 年 E101.C 巻 5 号 p. 338-342

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We experimentally demonstrate transistor operation in a vertical p+-MoS2/n-HfS2 van der Waals (vdW) heterostructure configuration for the first time. The HfS2/MoS2 heterojunction transistor exhibits an ON/OFF ratio of 104 and a maximum drain current of 20 nA. These values are comparable with the corresponding reported values for vdW heterojunction TFETs. Moreover, we study the effect of atmospheric exposure on the subthreshold slope (SS) of the HfS2/MoS2 transistor. Unpassivated and passivated devices are compared in terms of their SS values and IDS-VGS hysteresis. While the unpassivated HfS2/MoS2 heterojunction transistor exhibits a minimum SS value of 2000 mV/dec, the same device passivated with a 20-nm-thick HfO2 film exhibits a significantly lower SS value of 700 mV/dec. HfO2 passivation protects the device from contamination caused by atmospheric moisture and oxygen and also reduces the effect of surface traps. We believe that our findings will contribute to the practical realization of HfS2-based vdW heterojunction TFETs.

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© 2018 The Institute of Electronics, Information and Communication Engineers
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