Post-Packaging Simulation Based on MOSFET Characteristics Variations Due to Resin-Molded Encapsulation

Abstract

A method for estimating circuit performance variation caused by packaging-induced mechanical stress is proposed. The developed method is based on the stress distribution chart for the target integrated circuit (IC) and the stress sensitivity characteristics of individual devices. This information is experimentally obtained using a specially designed test chip and a cantilever bending calibration system. A post-packaging analysis and simulation tool, called Stress Netlist Generator (SNG), is developed for conducting the proposed method. Based on the stress distribution chart and the stress sensitivity characteristics, SNG modifies the SPICE model parameters in the target netlist according to the impact of the packaging-induced stress. The netlist generated by SNG is used to estimate packaging-induced performance variation with high accuracy. The developed method is remarkably effective even for small-scale ICs with chip sizes of roughly 1 mm², such as power management ICs, which require higher precision.