IEICE Transactions on Electronics
Online ISSN : 1745-1353
Print ISSN : 0916-8524
Regular Section
Gate Array Using Low-Temperature Poly-Si Thin-Film Transistors
Mutsumi KIMURAMasashi INOUETokiyoshi MATSUDA
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2020 Volume E103.C Issue 7 Pages 341-344


We have designed gate arrays using low-temperature poly-Si thin-film transistors and confirmed the correct operations. Various kinds of logic gates are beforehand prepared, contact holes are later bored, and mutual wiring is formed between the logic gates on demand. A half adder, two-bit decoder, and flip flop are composed as examples. The static behaviors are evaluated, and it is confirmed that the correct waveforms are output. The dynamic behaviors are also evaluated, and it is concluded that the dynamic behaviors of the gate array are less deteriorated than that of the independent circuit.

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© 2020 The Institute of Electronics, Information and Communication Engineers
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