A Differential Input/Output Linear MOS Transconductor

抄録

In this paper, a differential input/output linear MOS transconductor using an adaptively biasing technique is proposed. The proposed transconductor based on a differential pair is linearized by employing an adaptively biasing circuit. The linear characteristic of the individual differential output currents are obtained by introducing the adaptively biased currents to terminate the differential output terminals. Using the proposed technique, the common-mode rejection ration (CMRR) becomes high. Simulation results show that the proposed technique is effective for improvement of the linearity and other performances.